Bachelor's or master's degree (BE/ B.Tech or MS/ M.Tech ) in Electronics & Communication, Electrical & Electronics Engineering, or related field from a reputed institution
6-10 years of hands-on experience in high-speed analog and custom layout design
Strong foundation in electrical engineering fundamentals with ability to translate theory into practical layout solutions
Proficiency in industry-standard EDA/CAD tools for schematic-to-layout implementation and physical design execution
Proven track record of delivering high-performance analog layouts across multiple technology nodes
Expertise in advanced layout techniques: device matching, symmetry, signal flow optimization, clock routing, shielding, and parasitic (RC) minimization
Strong experience in biasing strategies and robust power/ground routing methodologies
Good understanding of reliability considerations: EM/IR, latch-up prevention, ESD protection, and power planning
Additional Compensation and Benefit Elements
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
Additional Information
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As an Analog Layout Staff Engineer with Marvell, you'll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You'll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.
What You Can Expect
Independently design and develop complex analog, mixed-signal, and custom layouts using industry-standard EDA tools (e.g., Cadence Virtuoso, Mentor Graphics) across advanced nodes including deep sub-micron, FinFET , and GAA technologies
Apply established layout methodologies and best practices to ensure high-quality, optimized layout execution
Collaborate closely with circuit designers to understand schematic intent and translate it into efficient, high-performance physical layouts
Perform and drive physical verification closure, resolving DRC, LVS, ERC, and antenna violations within defined project timelines
Conduct EM/IR analysis to identify electromigration and IR drop issues, and implement robust layout solutions to meet reliability targets
Mentor and support junior engineers through design reviews, ensuring adherence to quality, optimization, and design rule compliance standards
Take ownership of analog macro layout development, ensuring quality delivery, schedule adherence, and alignment with overall project goals