Master's degree and/or PhD Preferred in Electrical Engineering or related fields with 2+ years of experience.
Should have strong analog design fundamentals and experience in designing analog circuit blocks such as PLL, Data Converters, Oscillators and high-speed SerDes blocks (CTLE, FFE, DFE, CDR, PLL, Line driver, etc.).
Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must
Knowledge of the fundamentals on signal integrity improvement, noise reduction and Multi-GHz low-jitter clock generation & distribution.
Good understanding of analog layouts in FinFet and its effect on high-speed designs
Experienced in system level pre-tape out analog validation
Experienced in lab chip bring-up and debugging efforts
Strong communication and documentation skills
Additional Compensation and Benefit Elements
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
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Additional Information
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
CE-AMS - Join a world-class analog design team providing high performance analog and mixed mode circuits for industry-leading SERDES products. Candidate will have opportunity to architect and design circuits for high performance transceivers and other critical analog functions.
What You Can Expect
The candidate will be working on analog design of high-speed and high-performance SerDes in advanced technology nodes, 3nm, 2nm and beyond.
Participate in SerDes Architecture Development with DSP, Analog and Digital design teams.
Work with the AE for the IP characterization and validation plan
Product and customer supporting.
Provide instructions to the layout engineers.
Marvell · Hsinchu City