The candidate must have a Bachelor's Degree in Electrical or Computer Engineering or any STEM related education with at least 2+ years of experience -OR- Master's Degree in Electrical or Computer Engineering
At least 1+ years of coursework or experience in the following areas:
o Basic Logic Design
o Microprocessors
o Computer Architecture
o Digital design and RTL coding
o Verilog/SystemVerilog and/or VHDL
o Synthesis tools (Design Compiler, Genus)
o Scripting languages (Python, Perl, TCL)
Experience with advanced verification methodologies (UVM, OVM)
Knowledge of low-power design techniques
Understanding of physical design constraints and timing closure
Experience with version control systems (Git, Perforce)
Experience with simulation tools (ModelSim, VCS, Xcelium)
Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Texas, Austin
Additional Locations:
US, Arizona, Phoenix, US, Oregon, Hillsboro
Business group:
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement:
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USDWork Model for this RoleThis role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*Health insurancePaid time offEquity / stock optionsPerformance bonus
Additional Information
Job Details:
Job Description:
Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs. Participates actively in the definition of architecture and microarchitecture features of the CPU being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Documents micro architectural specs (MAS) of the CPU features being designed. Supports SoC customers to ensure highquality integration of the CPU block.
Intel · Texas, Austin