Architect and optimize end-to-end deployment pipelines for compact audio AI models from trained model through quantization, profiling, and production deployment on DSP/NPU targets
Define and drive DSP/NPU partitioning strategies, balancing workload allocation, memory bandwidth, latency, and power across processing elements on the SoC
Own simulation-to-RTL validation flows: develop bit-exact reference models, collaborate with RTL teams on functional verification, and close gaps between algorithmic intent and hardware behavior
Perform low-level implementation and optimization of signal processing and neural network kernels for fixed-point DSP and NPU instruction sets, maximizing utilization of MAC arrays, SIMD paths, and on-chip memory hierarchies
Profile and optimize inference performance (cycles, memory footprint, power) under strict always-on and real-time constraints typical of hearable/wearable devices
Design and maintain model compression and quantization workflows (PTQ, QAT) with rigorous quality tracking against floating-point baselines
Develop signal processing algorithms for array processing, beamforming, and spatial filtering, with a clear path from MATLAB/Python prototypes to deployable fixed-point implementations
Contribute to audio ASIC system architecture definition - informing hardware spec decisions (precision, buffer sizes, DMA structures, NPU config) based on algorithmic and deployment requirements
Generate IP (patents) and represent the team's technical depth to OEM customers in automotive and hearable segments
Mentor engineers in deployment best practices, embedded optimization, and hardware-aware algorithm design
Required Qualifications:
PhD in Electrical Engineering, signal processing, or related field
10+ years in audio/speech signal processing within a semiconductor environment, with significant hands-on deployment experience on DSP and/or NPU platforms
Demonstrated expertise in fixed-point algorithm implementation, model quantization (PTQ/QAT), and cycle-level optimization for resource-constrained processors
Strong working knowledge of simulation-to-RTL flows: bit-exact modeling, RTL co-simulation, and functional verification collaboration with design teams
Proficiency in C (embedded/firmware level), Python, MATLAB, and deep learning frameworks (TensorFlow/TFLite, PyTorch/ONNX)
Experience with low-level profiling tools, instruction set architectures, and memory optimization for embedded AI inference
Solid foundation in array signal processing, beamforming, and acoustic system design
Requirements
Direct experience with NPU/accelerator architectures (dataflow engines, weight-stationary/output-stationary designs) and their programming models
Familiarity with ASIC development cycles - from algorithm freeze through tapeout and silicon validation
Background in always-on, sub-mW audio processing for hearable, TWS, or wearable products
Track record of US patents in audio signal processing or embedded ML
Experience technically leading a small engineering team
EEO is the Law: Notice of Applicant Rights Under the Law .
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
The expected wage range for a new hire into this position is $200,000 to $275,000. Actual wage offered may vary depending on work location , experience, education, training, external market data
Benefits
Health insuranceParental leave
Additional Information
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X .
Principal Audio/DSP Systems Engineer
Analog Devices · MA, Wilmington