Layout Engineer, DEG
External
Micron Technology · Boise, IDFull-timeOn-siteToday
ComplianceRouting
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About the role
Design block-level layouts using Cadence Virtuoso including floorplanning, placement, routing, and optimization. Apply physical constraints (PDN, pin placement, routing blockages), ensure DRC/LVS/density/reliability compliance, support parasitic extraction, post-layout verification, ECOs, and create partial custom layouts for device-level or small analog blocks while collaborating with cross-site teams.
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