Help simulate power controller interplay, voltage-frequency operating points, and binning yields. Build the systems that push performance and power efficiency toward the speed of light.
Turn your understanding of silicon & firmware behavior into context engineering. Break down the silicon product optimization workflows into composable skills, hybrid retrieval stages, and orchestration layers.
Integrate silicon productization tools into a custom agent harness: define the tool registries (CLIs & MCPs), webhooks, trace capture, and human-in-the-loop checkpoints.
Lead eval-driven development for applied AI in production: error analysis on real silicon workflows, automated scorers of HW reasoning, CI regression gates that protect product quality.
Help set the team's AI direction. Mentor and grow the engineers around you. The silicon expertise here is strong; the AI bar is yours to raise.
What we need to see:
BS or MS in EE/CE/CS (or equivalent experience) and 8+ years in silicon bringup, firmware, or productization engineering.
Have deployed multiple production Python services and data pipelines, including at least one LLM-backed system that SMEs depend on for their everyday work.
Can read silicon characterization outputs (speed, power, voltage noise, or binning) and know the tradeoffs between them.
Have a working opinion of new AI tooling within a week of release. Not from reading the blog post. From running it.
Keeping up with every new feature and architectural change that NVIDIA packs into each chip is a real challenge, not to mention the weekly innovations in AI. And because our users are directly on the path to production, support questions don't always wait for business hours.
The payoff is that every product NVIDIA ships goes through the systems you'll help build. You'll be using AI to shape the world's AI platform. If that sounds exciting, let's talk!
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 184,000 USD - 287,500 USD for Level 4, and 224,000 USD - 356,500 USD for Level 5. You will also be eligible for equity and benefits .
Applications for this job will be accepted at least until June 13, 2026. This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
Additional Information
NVIDIA is the industry leader in high performance computing, gaming and AI. Our GPUs and SOCs give outstanding performance and efficiency, revolutionizing myriad fields like cell research, robotics, crypto mining and so many more. We revolutionized the AI world by inventing CUDA. And we are just getting started. The Silicon Co-Design Group (SCG) is where architecture, silicon, systems, and manufacturing converge to bring NVIDIA's products to life. Every CPU, GPU, and Tegra SoC NVIDIA has shipped in the past four years passed through our toolchain on its way to production. Over 200 product SKUs were optimized during the Blackwell generation alone! Now we're hiring the engineer who will lead the rebuild of that toolchain around AI.
We focus on the silicon layer of NVIDIA's productization work. Our tools take a chip from pre-silicon estimates through to the values that ship in firmware and populate customer specs. This role centers on the simulation and configuration engines that feed the firmware, manufacturing, and specification systems downstream, and how AI will optimize & automate every step. We're translating chip behavior into firmware-ready contracts, building agents that demystify sophisticated chip feature interactions, and developing evals that prevent bad products from shipping.
Nvidia · Santa Clara, CA