Sr. Staff Verification Engineer

Responsibilities

• Report to remote verification & design teams. Mentor junior verification engineers. (20%)
• Interface with system, digital hardware, embedded firmware, analog and cross functional teams. (10%)
• Drive adoption of advanced verification methodologies, best practices and tool evaluation. (5%)
• Technical support to silicon lab evaluation, test, product and application engineers. (5%)

Requirements

• 8+ years of industry experience in integrated circuit design verification (DV)
• B.S. or M.S. in Electrical or Computer Engineering
• Strong analytical, synthesis and problem solving skills
• In-depth knowledge and experience in digital IC verification for mixed-signal ICs with MCU based hardware systems (ARM, RISC-V, PIC, STM32) with memories, custom digital micro-architecture, interfaces, dedicated hardware peripherals, embedded signal processing, external IPs, and analog peripherals.
• Proficiency in System Verilog as High-level Verification Language and UVM implementation, Verilog/VHDL, scripting languages (Python, Perl), debugging capabilities, and industry leading EDA verification tools (Synopsys, Cadence, Siemens)
• Demonstration of technical leadership
• Experience with standard hardware protocols (I2C, I3C, SPI, MIPI)
• Independent, self-motivated, rigorous, innovating, team player and able to follow through
• Excellent verbal and written communication skills
• Knowledge of system-level aspects: signal processing, mixed-signal, digital hardware, embedded firmware, analog, modelling, test and application
• Experience with analog block behavioral modelling with SV RNM/Verilog/VHDL
• Experience with consumer and/or ITA market circuit developments

Benefits

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Company Intel

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