Bachelor's or master's degree (BE/ B.Tech or MS/ M.Tech ) in Electronics & Communication, Electrical & Electronics, or a related field from a reputed institution.
10-15 years of strong experience in high-speed analog, mixed-signal, and custom layout design.
Broad exposure across multiple projects, technology nodes, and layout architectures.
Deep understanding of electrical engineering fundamentals and layout behavior across advanced nodes.
Proven experience in handling complex and critical IPs with end-to-end ownership.
Expert-level proficiency in EDA tools, with the ability to influence layout flows and methodologies.
Demonstrated ability to introduce innovative and optimized layout solutions for complex designs.
Additional Compensation and Benefit Elements
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
Additional Information
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As a Senior Staff Layout Engineer with Marvell, you'll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You'll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.
What You Can Expect
Design and develop complex analog, mixed-signal, and custom layouts independently using Cadence Virtuoso, Mentor Graphics, and similar EDA tools across advanced nodes (deep sub-micron, FinFET , GAA).
Identify and implement improvements in layout methodologies to reduce turnaround time (TAT) and enhance efficiency.
Act as the key interface between layout and design teams, ensuring clear communication and alignment.
Drive end-to-end physical verification closure, resolving DRC, LVS, ERC, and antenna violations within project timelines.
Perform EM/IR analysis to identify IR drop and electromigration issues and implement reliable layout solutions.
Lead technical discussions, layout reviews, and contribute to knowledge sharing and process improvement initiatives.
Serve as the technical focal point for domain expertise within the team.
Own IPs/macros, including high-level integration and top-level layout decisions.
Provide critical layout feedback influencing circuit quality, performance, and architecture.
Apply strong engineering judgment to select optimal layout techniques across projects.
Represent the layout team in cross-functional discussions and decision-making forums.
Lead small teams or coordinate multiple block owners to drive project convergence.
Stay updated with evolving semiconductor technologies, tools, and methodologies.
Develop and maintain automation scripts (Perl, Tcl , SKILL) to improve productivity and workflow consistency.
Marvell · Bangalore, India