Master's degree and/or PhD Preferred in Electrical Engineering or related fields with 4+ years of experience. A successful candidate should have experience in some of the following designs:
D2D IP, PLL, Data Converters, Oscillators and high-speed SerDes design including Receiver and Transmitter design.
Experience in Single-ended High Density Parallel Interface for Chip to Chip Communication, UCIe, DDR5/LPDDR5; GDDR6/LPDDR6
Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must
Knowledge of the fundamentals on signal integrity improvement, noise reduction and Multi-GHz low-jitter clock generation & distribution.
Good understanding of analog layouts in FinFet and its effect on high-speed designs
Experienced in system level pre-tape out analog validation
Experienced in lab chip bring-up and debugging efforts
Strong communication skills
Additional Compensation and Benefit Elements
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
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Additional Information
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As an Analog IC Design Principal Engineer with Marvell, you'll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You'll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.
What You Can Expect
Seeking a Mixed Signal designer to be part of a key team designing highly sophisticated CMOS transceiver/SERDES products. Responsibilities would span architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as SPICE, Spectre, MATLAB etc.
Should be able to work in the lab independently or with test engineers to characterize, debug and validate designs. Would be required to generate design related documents, application specifications etc. and may support customers and FAEs as needed. May be required to interface with digital and SOC teams to facilitate design integration and cross-functional verifications.
Marvell · Bangalore, India