Have a Bachelor's or Master's in Electrical Engineering, Computer Engineering, Computer Science, or similar field. Degrees in mathematics, physics or other sciences may be considered provided adequate coursework in electronics was taken also or work experience has provided relevant knowledge since graduation.
Independently analyzes and optimizes small sub-circuit blocks within our overall design across Process, Voltage, Temperature
Responsible engineer for at least one major sub-circuit block from architecture definition to fine tuning.
Identifies and proposes innovative solutions to enhance the design of at least one major sub-circuit block.
Participates in root cause investigation and silicon validation of model to hardware correlation issues.
Mentors and coaches new and/or less experienced team members.
-Knowledge of communication and DSP algorithms preferred
-Verification experience with preference in UVM is a big plus.
Expected Base Pay Range (USD)
135,900 - 201,130, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
Benefits
Health insuranceEquity / stock options
Additional Information
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As a Digital IC Design Senior Staff Engineer with Marvell, you'll be a member of the Connectivity business group. Pushing the limits in communication with focus on data center and enabling AI infrastructure.
This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.
What You Can Expect
-Develop RTL designs using Verilog/SystemVerilog for digital IP blocks and subsystems.
-Translate architectural specifications into clean, synthesizable RTL
-Perform linting, CDC and low-power design checks
-Analyze timing, area, and power tradeoffs during design implementation
-Support synthesis and work with physical design teams on timing closure issues.
-Debug functional issues discovered during simulation, emulation, FPGA prototyping or silicon bring-up
Marvell · Irvine, CA