Relevant experience - in semiconductor RTL design for complex SoC, CPU, or GPU architectures.
Hands-on experience in RTL design using Verilog/SystemVerilog, including microarchitecture development, integration, and debug.
Working knowledge of GPU or high-performance digital design concepts, including control logic, datapath, memory systems, and Cache design.
Working knowledge of interpreting architectural specifications and driving design tradeoffs across performance, power, and area (PPA).
Experience with front-end ASIC design flows, including linting, synthesis, timing analysis, and design quality checks.
Strong analytical, and problem-solving skills, with the ability to identify and propose data-driven solutions.
Excellent written and verbal communication skills for technical documentation.
Excellent collaboration skills, with the ability to navigate ambiguity a fast-paced, global team environment.
Our Team
Benefits
At Samsung - SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role.
Additional Information
Position Summary
Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy - the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us!
Role and Responsibilities
As an Engineer or Senior or Staff GPU RTL Design Engineer, you will contribute to the design and development of complex RTL blocks and subsystems for Samsung's next-generation mobile GPU IPs, delivering high-quality, scalable implementations that power premium smartphones and adjacent consumer technologies.
In this individual contributor role, you will collaborate closely with architecture, power, physical design and emulation/silicon teams and work across multiple GPU functional domains-including control, datapath, cache and memory systems.
You bring curiosity, RTL design knowledge, and microarchitectural understanding to support design decisions, resolve cross-block challenges, and ensure robust, production-ready GPU designs across multiple IP generations.
You contribute to the microarchitecture definition and RTL implementation of complex GPU blocks and subsystems, translating architectural specifications into efficient, maintainable, and scalable hardware designs.
You enjoy learning about the RTL lifecycle, help driving design from microarchitecture through RTL development, integration, debug, and simulation readiness while ensuring consistent execution across multiple functional areas and projects.
You support technical excellence by driving design quality and accuracy, developing clean, synthesizable RTL, and collaborating with verification teams to enable thorough validation, resolve functional issues, and ensure coverage, robustness, and sustainability.
You help resolving functional design challenges, working with architecture, physical design, and system-level teams to address interface definition, timing, power, performance, and area tradeoffs early in the design cycle.
You take initiatives on moderate-to-complex projects and help advance best practices, methodologies by exploring emerging GPU technologies and RTL design methodologies.